Potato Processor

Hello Kristian,

I have been looking at the potato processor and have some doubts. I simulated the core in xilinx (ISE 14.1) ISE`s isim simulator with an imem_add.hex and a dmem_add.hex file as part of the testbench. The simulation works perfect.

Next, I try with a subtraction logic by writing down a simple c code and compiling it with the riscv-gcc and get a elf file. Using the extract_hex.sh script I generate the imem_hex and dmem_hex for the subtraction C code.

However, when I include these files in the testbench, the simulation still performs addition operation. I was able to identify this by pulling out the input and output signals at the alu_instance that shows the operands x and y as well as the result.

Can you suggest if there is anything that I have been doing wrong or i need to do some more steps.

Thanks a lot!!

Hi.

Is the result of the code correct?

I suspect that what is happening is that GCC emits an add-immediate instruction, addi, for doing the subtraction. This is necessary when subtracting a constant from a register since the ISA does not have a subtract-immediate instruction.

This can be verified by looking at the assembly code that GCC creates, or you can look at the signals alu_y_src (should be ALU_SRC_IMM) and alu_y (should be a negative number).

Kristian.

Hi,

I will try that out right now I was checking some more tests from the riscv-tests folder. will update you on any issues.

Thanks for the response !!

Akshay

Hi,

I used the following commands

riscv64-unknown-elf-gcc -c -m32 -I ../riscv-tests/ -o ../tests-build/add.o ../riscv-tests/add.S

riscv64-unknown-elf-ld -m elf32lriscv -T ../tests.ld ../tests-build/add.o -o ../tests-build/add.elf

riscv64-unknown-elf-objdump --disassemble-all ../tests-build/add.elf > ../tests-build/add.dump

cp -rf ../tests-build/add.elf .

./extract_hex.sh add.elf imem_add.hex dmem_add.hex

to generate the imem_add.hex and dmem_add.hex. However, once I run the extract_hex.sh I get only the imem_add.hex there is now dmem_add.hex generating.

am I doing any mistake in those scripts above.

Thanks !!

Akshay

The extract_hex.sh script only produces a dmem file if the test includes data that should be loaded into the data memory.

For many of the tests, this is not the case. In these cases you should use the empty_dmem.hex file instead.

Kristian.

Hi,

Yes I was just able to simulate the RTL correctly, I used the emptydmem.hex and used imem(add|sub|or|xor).hex generated from the riscv-tests (.S files) by using the commands and the extract_hex.sh and the simulation works perfect!!

Thanks a million for your help..

Akshay

Hi,

I had a very basic doubt, how did you understand that the HTIF performs a specific function which helped you to implement that as part of your design.As currently Iam trying to understand HTIF from the riscv repository but iam not able to make much headway in that. Was there any document that you referred to for the understanding of HTIF.

Thanks !!

Akshay

Hi,

I had a very basic doubt, how did you understand that the HTIF performs a specific function which helped you to implement that as part of your design.As currently Iam trying to understand HTIF from the riscv repository but iam not able to make much headway in that. Was there any document that you referred to for the understanding of HTIF.

Thanks !!

Akshay

I don't think the HTIF is described in any particular detail anywhere. It is meant as a mechanism for a processor and host environment to communicate, useful when, for instance, communicating between a simulator and a simulated processor instance.

It seems it is left up to each processor implementation how to implement the HTIF interface. In the Potato processor, writes to the TOHOST register causes the tohost_data signal to be updated with the value of the register and the tohost_updated signal to be pulsed. Similarly, if a host environment wishes to send data to the processor, the fromhost_data signal is set to the data and a pulse on the fromhost_updated signal causes the FROMHOST register in the processor to be updated.

It is worth noting that the new RISC-V priviledged extension specification calls the FROMHOST and TOHOST registers a non-standard extension and contains no additional details on how an HTIF interface should work.