Microcontroller core compatible with 16C55 and 16F84. Single cycle VHDL implementations of 16C55 and 16F84. Four times faster than the original MCUs, otherwise timing compatible. Watchdog and EEPROM are not implemented. Both implementations use the configurable PPX16 12/14 bit instruction width core, other MCUs using the same instruction set can easily be implemented by creating a new top level. There are utilities included that can create VHDL ROMs for simulation and synthesis. The utilites create generic ROMs that can be used for simulation and for synthesis with Leonardo and also Xilinx specific ROMs that can be used for XST synthesis. Batch files for runnning XST and Leonardo synthesis can be found in syn/xilinx/run/. Before you can run the scripts you need to compile hex2rom and xrom or download binaries from here. You must also put your hex file in either sw/c55.hex or sw/f84.hex. If you need to change target device and settings you need to edit the batch files and some of the files in syn/xilinx/bin/. The Leonardo batch file also creates the VHDL ROMs you need to run the Modelsim compile script in sim/rtl_sim/bin/. If you want to create ROMs without running the scripts use the following parameters for 16C55: hex2rom [-b] inputfile.hex ROM55 9l12s > ROM55.vhd And these for 16F84: hex2rom [-b] inputfile.hex ROM84 10l14s > ROM84.vhd Hex2rom can read intel/motorola hex and binary files. Browse source code here. Download latest tarball here.
- High performance, > 30 MIPS in Spartan 2 -5
- Supports synchronous ROM/RAM (Xilinx Block RAM compatible)
- Technology independent
- Tested in FPGA