OpenCores

rtfSpriteController / Hardware cursors

Project maintainers

Details

Name: rtf_sprite_controller
Created: Feb 2, 2013
Updated: Oct 16, 2022
SVN Updated: Oct 23, 2022
SVN: Browse
Latest version: download (might take a bit to start...)
Statistics: View
Bugs: 0 reported / 0 solved
Star1you like it: star it!

Other project properties

Category:Video controller
Language:Verilog
Development status:Alpha
Additional info:
WishBone compliant: No
WishBone version: n/a
License: LGPL

Descripton

Two types of controllers are present in this project. The first controller, rfSpriteController.sv, uses image buffers which may be loaded at any time. Thus the amount of memory bandwidth in use may be controlled. The second controller operates without buffers and requires data for the scanline for each scanline of the sprite as scanlines are encountered. The first controller is capable of simple animations.

Features Controller #1:

  • parameterized number of sprites/cursors 1,2,4,6,8,10,14,16 or 32
  • 4kB sprite image cache buffers
  • each image cache is capable of holding multiple sprite images or animation frames
  • programmable image offset within cache
  • programmable sprite width,height, and pixel size
  • sprite width and height may vary from 1 to 256 pixels as long as the product does not exceed 2048.
  • pixels may be programmed to be 1 to 16 video clocks both height and width are programmable
  • programmable sprite position
  • 8, 16, or 32 bits for color RGB(332), ARGB(1555) or ARGB(8888) eg 32k color + 1 bit alpha blending indicator (1,5,5,5)

Animations

  • simple animations by cycling through frames stored in the image cache.
  • animation frame size, frame count, and frame rate control
  • auto-restart of animations
  • can animate without CPU intervention or using bus cycles

Bus Interfaces

  • 32-bit bus slave programmed as MMIO device
  • 128-bit DMA bus master
  • 40-bit ZRGB(4,12,12,12) video input and output

DMA

  • an embedded DMA controller is used for sprite load
  • triggered by vertical sync or on demand DMA
  • fixed display and DMA priority sprite 0 highest, sprite 31 lowest

Features Controller #2:

  • up to 32 sprites supported
  • image data is loaded during horizontal blanking interval
  • max size up to 32hx512v
  • four colors simultaneously per sprite (3 + transparent)
  • sprites linkable to increase color selection to 16
  • 64-bit bus transfers
  • minimal buffering of image data