sd card controller
At the time of SD data reading, an FIFO error occurs when define SIM. This cause is because Wishbone Master Write and Read occurred at the same time. The point of the problem: ---SD_data_master.v, line:418-419--- rec_done<=1; start_tx_fifo<=1;
---Modify, line:418-419--- rec_done<=1; if(!rx_cycle) <---Add start_tx_fifo<=1;
On "2: Send CMD3, 48-bit Response, All Error check enable" test, a CRC error occurs and does a loop in a "while" sentence(line 2471). The point of the problem: ---SD_controller_top_tb.v, line:2364~2365--- sdModelTB0.add_wrong_cmd_crc<=1; sdModelTB0.add_wrong_cmd_indx<=1;
---Add, line:2442--- sdModelTB0.add_wrong_cmd_crc<=0; sdModelTB0.add_wrong_cmd_indx<=0;
Good spoted
However the 'SIM' define is obsolete it was a hack used in the old test bench in several places to circumvent the check of various card replays.SYN should always be used nowdays, this will be fixed later
The sdModelTB0.add_wrong_cmd_crc<=1; is used to test the error checking path. However is see some break is needed if a error is detected otherwise it get stuck there.