Unsigned serial divider

Hi John, Thanks for the serial divider routine. It works very well. I concur with Harold's findings. I was experimenting with the routine to reduce the number of XST synthesis warnings I got. I thought you might be interested in my notes

Thanks, Bob S.

// Include S_PP in width declaration of grand_divisor to reduce synthesis warnings

reg M_PP+N_PP+R_PP-S_PP-2:0 grand_divisor;

// Include S_PP in width declaration of subtract_node to reduce synthesis warnings

wire M_PP+N_PP+R_PP-S_PP-1:0 subtract_node; // Subtract node has extra "sign" bit

// Include S_PP in width declaration of divisor_node to reduce synthesis warnings

wire M_PP+N_PP+R_PP-S_PP-2:0 divisor_node; // Shifted version of grand divisor

// Include S_PP in width declaration of quotient_reg to reduce synthesis warnings reg M_PP+R_PP-S_PP-1:0 quotient_reg; // Used exclusively for the held output

// Include S_PP in width declaration of quotient_node to reduce synthesis warnings

wire M_PP+R_PP-S_PP-1:0 quotient_node; // Shifted version of quotient

// From: assign divisor_node = {1'b0,grand_divisorM_PP+N_PP+R_PP-2:1}; // To: assign divisor_node = {1'b0,grand_divisorM_PP+N_PP+R_PP-S_PP-2:1}; // From: if (~subtract_nodeM_PP+N_PP+R_PP-1) grand_dividend <= subtract_node; // To: if (~subtract_nodeM_PP+N_PP+R_PP-S_PP-1) grand_dividend <= subtract_node; // From: assign divisor_node = {1'b0,grand_divisorM_PP+N_PP+R_PP-2:1}; // To: assign divisor_node = {1'b0,grand_divisorM_PP+N_PP+R_PP-S_PP-2:1};

Thanks very much. This seems to be a very good idea, and it is good to have it recorded here for all to see.