System09

1. RTI does not test the Entire flag retrieved from Condition Codes on the stack. Instead it tests the Current Entire Flag.

2. SYNC should continue execution if an interrupt is received, but masked.

3. MUL should not affect Half carry (H), Negative (N) or Overflow (V) Flags. The Carry flag (C) should be set according to bit 7 of the result in ACCB

4. DAA should set Negative (N) and Zero (Z) flags. Overflow (V) is undefined.

5. Interrupts: int_cc_state is enumerated but not defined. Make bogus interrupts perform an RTI after stacking the registers.

6. NMIs should be mask on reset until the S Stack pointer is loaded

16th July 2006 Bugs Fixed.

1. RTI has had extra state added to test Entire flag after pulling the Condition codes off the stack

2. Sync continues execution if a masked interrupt received or performs an interrupt if the mask is clear. SYNC has not been fully tested. SYNC DOES NOT wait for the Interrupt to be asserted for 3 clock cycles, as described in the 6809 programming manual.

3. A new ALU operator has been added (alu_mul) that behaves like a 16 bit add (alu_add16), but does not affect the Half Carry (H), Negative (N) or overflow (V) flags. It sets the Carry (C) Flag to bit 7 of the result in ACCB. Note that the MUL instruction now adds the intermediate MD register or zero depending on the EA register bit from the right input of the ALU. This ensures that the Zero and Carry flags are set correctly.

4. DAA now sets Zero (Z), Negative (N)and Overflow (V) flags. The operation of the Overflow flag is not defined in the 6809 programming reference manual. I have Excusive Ored bit 7 of the original ACCA value with Bit 7 of the Decimal Adjusted result and Exclusived Ored that with the pre Decimal Adjust Carry input. This appears to do the same thing as an EF68A09P under a number of test senerios, but is by no means and exhaustive test.

5. Interrupts that have disappeared after all the registers are stacked are vectored off to the RTI state to restore the registers and return from the interrupt.

6. The S register reset control sets an interrupt mask for the NMI input. This will only occur when the CPU is reset. The NMI Mask is reset whenever the S stack pointer is loaded from the ALU or pulled off the stack. This prevents NMI's occuring before the program has time to load the stack pointer used by the interrupt to save the registers.