Castillo Villar, Javier

SystemC/Verilog Random Number Generator

## Description

A SystemC/Verilog random number generator based on the combination of a LFSR and a CASR with very good statistical properties. Based on the Thomas E. Tkacik at CHES 2002 work. For more information in spanish visit [vhdl.es](https://vhdl.es/como-generar-numeros-aleatorios-en-vhdl-con-un-lfsr/)

## Features

\- Very good statisticall properties  
\- Synthesizable

## Status

\- Done


<h2 id="description">Description</h2>
<p>A SystemC/Verilog random number generator based on the combination of a LFSR and a CASR with very good statistical properties.
Based on the Thomas E. Tkacik at CHES 2002 work.
For more information in spanish visit <a href="https://vhdl.es/como-generar-numeros-aleatorios-en-vhdl-con-un-lfsr/">vhdl.es</a>


</p>
<h2 id="features">Features</h2>
<p>- Very good statisticall properties<br />
- Synthesizable</p>
<h2 id="status">Status</h2>
<p>- Done</p>


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SystemC/Verilog Random Number Generator

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