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TIME SLOT INTERCHANGE DIGITAL SWITCH

## Description

The TDM\_Switch core is a non-blocking digital switch that has a capacity of 256 x 256 channels at 2.048 Mb/s. Some of the main features are: Processor Mode and input offset delay.

## Features

\- 256 x 256 channel non-blocking switching at 2.048 Mb/s  
\- Accept 8 serial data streams of 2.048 Mb/s  
\- Per-stream frame delay offset programming  
\- Connection memory block programming  
\- Microprocessor Interface

## Status

This IP core is synthesized for Xilinx SPARTAN-II series FPGA’s, fit at xc2s50-6tq144 device and the post place & route simulation model simulate with Cadence NC-Sim simulator.


<h2 id="description">Description</h2>
<p>The TDM_Switch core is a non-blocking digital switch that has a capacity of 256 x 256 channels at 2.048 Mb/s. Some of the main features are: Processor Mode and input offset delay.</p>
<h2 id="features">Features</h2>
<p>- 256 x 256 channel non-blocking switching at 2.048 Mb/s<br />
- Accept 8 serial data streams of 2.048 Mb/s<br />
- Per-stream frame delay offset programming<br />
- Connection memory block programming<br />
- Microprocessor Interface</p>
<h2 id="status">Status</h2>
<p>This IP core is synthesized for Xilinx SPARTAN-II series FPGA’s, fit at xc2s50-6tq144 device and the post place &amp; route simulation model simulate with Cadence NC-Sim simulator.</p>


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TIME SLOT INTERCHANGE DIGITAL SWITCH

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