This is a Verilog code for TMS1000 4-bit processor chip generally used in calculators. Modelsim based tcl/tk GUI testbench illustrates the TMS1000 used as an interval timer and performs integer BCD multiplication, division, addition, and subtraction. The calculator is described in tms1000 programmers reference manual. Similarly SR-16 calculator emulation is also done.
The url of the svn repository is: https://opencores.org/websvn/listing/tms1000/tms1000