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Name: tms1000
Created: Mar 21, 2021
Updated: Mar 21, 2021
SVN Updated: Mar 22, 2021
SVN: Browse
Latest version: download (might take a bit to start...)
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Bugs: 0 reported / 0 solved
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Other project properties

Development status:Beta
Additional info:
WishBone compliant: No
WishBone version: n/a
License: LGPL


This is a Verilog code for TMS1000 4-bit processor chip generally used in calculators. Modelsim based tcl/tk GUI testbench illustrates the TMS1000 used as an interval timer and performs integer BCD multiplication, division, addition, and subtraction. The calculator is described in tms1000 programmers reference manual. Similarly SR-16 calculator emulation is also done.

The url of the svn repository is: