Serial UART

Even if the user submits first the data and then drives CS_N and WR_N, the module TX_Unit will not get the right data.

TxData is assigned 1 clock later than load, and the same load is used by the TxUnit to load the same TxData, which is not available at the moment.

Solution, create another signal LoadTX, assign it together with TxData, miniUART.vhd:

• if Load = '0' then

•    TxData <= "ZZZZZZZZ";

• elsif (Load = '1' and Addr = "00") then

•    TxData <= DataIn;

• end if;

•     if (Load = '1' and Addr = "00") then

•        TxData <= DataIn;

•        LoadTX <= '1';

•     else

•        LoadTX <= '0';

•     end if;

• end if;

Besides, I think it might be useful to keep TxData, instead of tri-stating it.

Don't forget to change the Load signal in two other places: 1) TxDev : TxUnit instantiation 2) RSBusCtrl process, IntTx_N is set back to 1 on load, this too has to be LoadTX.