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* Wupper: PCIe DMA Engine for Xilinx FPGAs

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Missing packets in receive (PC => FPGA) path #4
Closed fransschreuder opened this issue about 9 years ago
fransschreuder commented about 9 years ago

In the PC => FPGA path, packets are missing due to 2 reasons:

  • the dma write process is not waiting when the tags are all occupied
  • the fifo in the user application should use prog_full in stead of full
fransschreuder commented about 9 years ago

Should be fixed in svn revision 27

fransschreuder closed this about 9 years ago
aborga commented about 9 years ago

Great! perfect patch!8)

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