Wupper: PCIe DMA Engine for Xilinx FPGAs

In my test project, I call data_from_host() routine. the data size is 1024 and the tlp is 256, so the wupper core will generate 4 req to host.The data from host seems to be out of order. the wupper core does not handle this condition!

Could you give some more information? How is the data out of order? There could be a difference in endianness (per 32 bytes).

Frans

Hi?Frans

Thanks for your reply!

Since I can not attach a picture here, I have sent you an email with chipscope pictures in which an out of order data is presented. the email address is: fransschreuder@opencores.org

Steven

Hello Steven, In the wuppet core the requests happen in order. It seems that your particular PC has decided to send the TLPs in a different order to Wupper. Since wupper does no re ordering, but simply uses a fifo it is difficult to tackle your problem in the core. This behaviour has not been observed in our servers. Does it always arrive out of order or is it random? Frans

Hi,Frans

If the number of request is larger than 1, the probability is pretty high in my hardware platform.

the following link also describe the multiple read request problem

http://xillybus.com/tutorials/pci-express-dma-requests-completions

our hardare is: i5 CPU, the mainboard is B250M Pro 4, linux version is: linux3.10.108(ubuntu16.04)

could you please tell us your hardware and software configuration? thanks

Steven

Could you try with the latest version of Wupper? I believe there is a reduced chance for packets to arrive out of order, because the request rate now matches the reply rate.

Dear @wubiao07, I will close this issue because it can't be reproduced here and there was no reply in 2 months.

Dear @aborga, I have been trying to close this issue for 6 months now, it seems that you can do it, but I can't. Can you close it for me?

The ordering of FromHost data has been fixed in the latest commit.