Soft Decision Viterbi Decoder
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Details
Name: viterbi_decoder_soft_decision
Created: Jul 22, 2025
Updated: Jul 26, 2025
SVN Updated: Jul 26, 2025
SVN: Browse
Latest version: download (might take a bit to start...)
Statistics: View
Bugs: 0 reported / 0 solved
Created: Jul 22, 2025
Updated: Jul 26, 2025
SVN Updated: Jul 26, 2025
SVN: Browse
Latest version: download (might take a bit to start...)
Statistics: View
Bugs: 0 reported / 0 solved
Star0you like it: star it!
Other project properties
Category:ECC core
Language:Verilog
Development status:Stable
Additional info:
WishBone compliant: No
WishBone version: n/a
License: LGPL
Language:Verilog
Development status:Stable
Additional info:
WishBone compliant: No
WishBone version: n/a
License: LGPL
A fully tested Viterbi decoder, rate=1/2 with generator polynomials g0 = 010 and g1 = 101. The soft input bit width and trace back length are configurable. It shows how the path metrics, branch metrics, add-compare-select, and trace back work.
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