WISHBONE DMA/Bridge IP Core

Pg 26 of WISHBONE DMA/IP Bridge IP Core, dma_doc.pdf Rev 1.5, January 27,2002, section 4.4.4 indicates that the value after reset is FFFFFFFCh. It should be FFFFFFF0h.

From wb_dma_ch_rf.v module,

assign ch_am0 = (CH_EN & HAVE_CBUF) ? {ch_am0_r, 4'h0} : 32'hffff_fff0;

and ch_am0_r is defined:

always @(posedge clk or negedge rst) if(!rst) ch_am0_r <= #1 28'hfffffff; else if(ch_am0_we) ch_am0_r <= #1 wb_rf_din31:4;

So the default value for ch_am0 is 32'hfffffff0;