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Individual Project
by mayurkhairnar on Mar 4, 2019 |
mayurkhairnar
Posts: 2 Joined: Feb 12, 2019 Last seen: Nov 5, 2024 |
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Hello,
I am new to this site having working knowledge of Verilog & SV. I am interested in taking up something to do on my own. Please suggest how should I proceed. Thank you in Advance. |
RE: Individual Project
by sujeth_kumar on Mar 5, 2019 |
sujeth_kumar
Posts: 1 Joined: Mar 5, 2019 Last seen: Jun 27, 2019 |
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Hello, I'm a Junior Engineer in the field of verification too. I'd be more than happy to collaborate with you and work on an exciting project.
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RE: Individual Project
by Sameer.Sameer on Mar 5, 2019 |
Sameer.Sameer
Posts: 22 Joined: Dec 11, 2017 Last seen: Oct 25, 2024 |
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Hello,
I am new to this site having working knowledge of Verilog & SV. I am interested in taking up something to do on my own. Please suggest how should I proceed. Thank you in Advance. You can join my project - design of the Taar microprocessor. https://opencores.org/projects/taar https://opencores.org/forum/Cores/0/5939 I am studying qflow to see if it is suitable to simulate a clockless processor design like Taar. What do you think ?? By the way, do you live in India ?? |
RE: Individual Project
by cxa9831 on Mar 5, 2019 |
cxa9831
Posts: 1 Joined: Feb 26, 2019 Last seen: Feb 22, 2021 |
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Hey, I'm totally new to this website. I'm not sure how to use this website I'm open to work on projects.
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RE: Individual Project
by mayurkhairnar on Mar 12, 2019 |
mayurkhairnar
Posts: 2 Joined: Feb 12, 2019 Last seen: Nov 5, 2024 |
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Yes. I live in India. I am going to look at your project shortly. But I am relatively an inexperienced guy. Don't know much about processor design. Lets see.
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RE: Individual Project
by Samyadelothman on Jun 16, 2019 |
Samyadelothman
Posts: 1 Joined: Mar 4, 2019 Last seen: Jul 29, 2022 |
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Hello, I'm a Junior Engineer in the field of verification too. I'd be more than happy to collaborate with you and work on an exciting project.
Hello, Would you like to work with me on SDRAM controller? |
RE: Individual Project
by karty97 on Jun 16, 2019 |
karty97
Posts: 2 Joined: May 8, 2018 Last seen: May 22, 2022 |
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Hello, I'm a Junior Engineer in the field of verification too. I'd be more than happy to collaborate with you and work on an exciting project.
Hello, Would you like to work with me on SDRAM controller? Sir I would love to contribute to this project and be a part of it. Please let me know about any more details regarding this project. |
RE: Individual Project
by vikas0710 on Jun 17, 2019 |
vikas0710
Posts: 1 Joined: Dec 10, 2017 Last seen: Sep 9, 2022 |
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Hello, I'm a Junior Engineer in the field of verification too. I'd be more than happy to collaborate with you and work on an exciting project.
Hello, Would you like to work with me on SDRAM controller? Hi,I would like to contribute in your project related to sdram controller. Please can you send the details about it. |
RE: Individual Project
by surajrgupta on Jun 17, 2019 |
surajrgupta
Posts: 1 Joined: Apr 10, 2019 Last seen: Apr 20, 2021 |
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I would like to work with you on this project.
Please send details.
Hello, I'm a Junior Engineer in the field of verification too. I'd be more than happy to collaborate with you and work on an exciting project.
Hello, Would you like to work with me on SDRAM controller? |
RE: Individual Project
by abdul_muneeb on Apr 17, 2020 |
abdul_muneeb
Posts: 1 Joined: Apr 16, 2020 Last seen: May 30, 2022 |
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Guys I am going to work on Dcache do you help me ?
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RE: Individual Project
by nasirkhanpak25 on Apr 17, 2020 |
nasirkhanpak25
Posts: 4 Joined: Aug 21, 2018 Last seen: Apr 17, 2022 |
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Guys I am going to work on Dcache do you help me ?
Muneeb is it you bro from lampro i am working on the same
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RE: Individual Project
by rahulkumarbudhwani on May 11, 2020 |
rahulkumarbudhwani
Posts: 1 Joined: Jul 11, 2016 Last seen: Nov 2, 2020 |
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I have just finished book of Stuart Sutherland of SystemVerilog for Synthesis and Simulation. I am now excited work on some project. Therefore, is there anyone with whom I can collaborate?
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