xgate :: Overview

Project maintainers


Name: xgate
Created: Aug 1, 2009
Updated: May 21, 2012
SVN Updated: Jan 27, 2013
SVN: Browse
Latest version: download (might take a bit to start...)
Statistics: View
Bugs: reported / solved

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Other project properties

Category: Coprocessor
Language: Verilog
Development status: Alpha
Additional info: none
WishBone compliant: Yes
WishBone version: n/a
License: LGPL


The Xgate Co-processor Module, Xgate, is a 16 bit programmable RISC processor that is managed by a host CPU to reduce the host load in handling interrupts. Because the Xgate is user programmable there is a great deal of user control in how to preprocess data from peripheral modules. The module may be configured as a simple DMA controller to organize data such that the host only deals with whole messages and not individual words or bytes. The Xgate may also deal with higher levels of messaging protocols than the peripheral hardware recognizes. Encryption algorithms are also supported by the instruction set.


• Instruction set compatible with Freescale XGATE co-processor
• Handles up to 127 interrupt inputs
• Eight software triggerable interrupt channels.
• Eight semaphore registers to coordinate host/Xgate shared memory.
• Static synchronous design
• Fully synthesizable


Verilog Code: 85%
Documentation: 60%

Please see the "News" tab for more detailed information or the README file in the "trunk" SVN directory.

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