OpenCores

Details

Name: 1g_ethernet_dpi
Created: Oct 8, 2016
Updated: Oct 12, 2016
SVN Updated: Mar 8, 2017
SVN: Browse
Latest version: download (might take a bit to start...)
Statistics: View
Bugs: 0 reported / 0 solved
Star2you like it: star it!

Other project properties

Category:Communication controller
Language:Verilog
Development status:Stable
Additional info:Design done, FPGA proven
WishBone compliant: No
WishBone version: n/a
License: LGPL

Description

Current project provides idea of complex network design verification via [{Linux-tunnel interface} + SystemVerilog DPI-C}].