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Details

Name: 68hc08
Created: Feb 1, 2007
Updated: Dec 20, 2009
SVN Updated: Jul 16, 2009
SVN: Browse
Latest version: download (might take a bit to start...)
Statistics: View
Bugs: 1 reported / 1 solved
Star1you like it: star it!

Other project properties

Category:Processor
Language:VHDL
Development status:Stable
Additional info:FPGA proven
WishBone compliant: No
WishBone version: n/a
License:

MC68HC08 clone

A MC68HC08 clone in VHDL as single file. Twice performance as the original. Multiplication is done in one clock cycle. Division in two clock cycles.

Features

- feature1
- feature1.1
-feature1.2
-feature2

2007.02.08 first version

tested with C compiler works OK with interrupts
2009.07.16 new version, bugfix at opcode 7E mov ,X+,opr8a X post increment fixed