OpenCores

Attiny Atmega Xmega core

Project maintainers

Details

Name: attiny_atmega_xmega_core
Created: Mar 18, 2018
Updated: Mar 9, 2020
SVN Updated: Aug 2, 2019
SVN: Browse
Latest version: download (might take a bit to start...)
Statistics: View
Bugs: 1 reported / 1 solved
Star1you like it: star it!

Other project properties

Category:Processor
Language:Verilog
Development status:Beta
Additional info:Design done, FPGA proven
WishBone compliant: No
WishBone version: n/a
License: LGPL

Description

This is a configurable Atmel processor and support eight configurations:
1) REDUCED
2) MINIMAL
3) CLASSIC_8K
4) CLASSIC_128K
5) ENHANCED_8K
6) ENHANCED_128K
7) ENHANCED_4M (Not supported yet)
8) XMEGA

I provide the links directly to GIT projects for easy update.

The processor IP and several IO IP's and can be downloaded from here: https://git.devboard.tech/rtl/ip/tree/master/CORE/8BIT/ATXMEGA

The implementation example will oscillate between DIGILENT Arty and NexusVideo depending where I am when I make the last update and can be downloaded from here: https://git.devboard.tech/rtl/xmega-tst-xilinx

On this directory, under the AtmelStudio project example debug directory's is an application that help developers to easy convert .hex files to .mem files and is described here: https://git.devboard.tech/utility/intel-hex-to-rtl-mem

The implementation for LATTICE MachXOFL Starter Kit can be downloaded from here: https://git.devboard.tech/rtl/xmega-tst-lattice

On LATTICE platforms it seems that Latice Diamond have some issues with generic distributed BRAM RAM's and ROM's, until Lattice will give a workaround for this issue without using IPxpress.

All details about this core on GIT

I begin to add support for this core on CPP-SDK that can be found here: https://git.devboard.tech/sdk/cpp