chou, joe

Generic AXI DMA

## Description

An AXI DMA fits the peripheral (such as I2S, UART, SPI….) it needs DMA capability in SoC; the DMA will move data between the peripheral and system memory for efficient data transfer, also saving CPU computing power.

## Overview

\- AXI compliant; 32-bit data width.  
\- Bi-directional; independent read/write channel, and also read/write channel can be executed in parallel.  
\- Byte addressable; DMA starting address and transfer length could not have to be a multiple of 4.  
\- Maximum burst length is 8 words, and burst access won’t cross 8-word boundary.  
\- Outstanding transaction support.  
\- Response error/time-out support.  
\- APB interface for register programing  
\- Peripheral interface protocol: AXI stream


<h2 id="description">Description</h2>
<p>An AXI DMA fits the peripheral (such as I2S, UART, SPI….) it needs DMA capability in SoC; the DMA will move data between the peripheral and system memory for efficient data transfer, also saving CPU computing power.</p>
<h2 id="overview">Overview</h2>
<p>-	AXI compliant; 32-bit data width.<br />
-	Bi-directional; independent read/write channel, and also read/write channel can be executed in parallel.<br />
-	Byte addressable; DMA starting address and transfer length could not have to be a multiple of 4.<br />
-	Maximum burst length is 8 words, and burst access won’t cross 8-word boundary.<br />
-	Outstanding transaction support.<br />
-	Response error/time-out support.<br />
-	APB interface for register programing<br />
-	Peripheral interface protocol: AXI stream<br />
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</p>


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Generic AXI DMA

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