Project maintainers


Name: eco32
Created: Feb 3, 2014
Updated: Apr 22, 2017
SVN Updated: Nov 13, 2016
SVN: Browse
Latest version: download (might take a bit to start...)
Statistics: View
Bugs: 0 reported / 0 solved
Star1you like it: star it!

Other project properties

Category:System on Chip
Development status:Alpha
Additional info:FPGA proven
WishBone compliant: No
WishBone version: n/a
License: BSD

Current stable version

Moved to GitHub.


The ECO32 system is a microprocessor system-on-chip, consisting of
a 32-bit CPU and several controllers for peripheral devices (keyboard,
character display, timer, serial line, SDRAM, Flash-ROM, IDE disk).

The ECO32 CPU is a simple 32-bit RISC processor with an instruction
set loosely modelled after MIPS, currently without floating point
instructions. We want to execute some flavour of UNIX on it, so it
has got two operating modes (kernel/user) and a memory management
unit (paging with TLB support). The processor was first simulated
at the instruction set level (the simulator is included), then at
the HDL level, and has finally been implemented in an FPGA.

Included in the project is an ANSI C compiler (LCC from Fraser and
Hanson) with a back-end for ECO32, a simple tool chain (assembler
and linker), as well as a monitor program, which can be flashed into
non-volatile memory on an FPGA board. Also included are tools to
create a disk image which can be used as the system disk with the
simulator. A disk server makes this "disk" available for the real
ECO32 on an FPGA over a serial line. An IDE (parallel ATA) disk or
an SSD can be accessed from the real ECO32 as well.