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Details

Name: jtag_master
Created: May 26, 2010
Updated: Jun 8, 2010
SVN Updated: Feb 6, 2011
SVN: Browse
Latest version: download (might take a bit to start...)
Statistics: View
Bugs: 0 reported / 0 solved
Star6you like it: star it!

Other project properties

Category:Communication controller
Language:VHDL
Development status:Alpha
Additional info:
WishBone compliant: No
WishBone version: n/a
License: LGPL

Description

This is a JTAG Master written in VHDL. It's simulated and tested with XC9500 and the jtag slave from opencores (http://opencores.orgproject,jtag)