Universal multi-function CORDIC

Project maintainers


Name: kvcordic
Created: Mar 6, 2014
Updated: Mar 8, 2014
SVN Updated: Mar 9, 2014
SVN: Browse
Latest version: download (might take a bit to start...)
Statistics: View
Bugs: 0 reported / 0 solved
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Other project properties

Category:Arithmetic core
Development status:Beta
Additional info:
WishBone compliant: No
WishBone version: n/a
License: Others


kvcordic is a collection of files comprising an implementation of a universal CORDIC algorithm (rotation/vectoring direction, circular/linear/hyperbolic mode) high-level synthesis benchmark by Nikolaos Kavvadias.

The design is a universal CORDIC IP core supporting all directions (ROTATION, VECTORING) and modes (CIRCULAR, LINEAR, HYPERBOLIC). The I/O interface is similar to e.g. the CORDIC IP generated by Xilinx Core Generator). It provides three data inputs (xin,yin, zin) and three data outputs (xout,yout, zout) as well as the direction and mode control inputs. The testbench will test the core for computing cos (xin), sin (yin), arctan(yin/xin), yin/xin, √w, 1/√w, with xin = w + 1/4, yin = w − 1/4, but it can be used for anything computable by CORDIC iterations. The computation of 1/√w is performed in two stages: a) y = 1/w, b) z = √y.

The design is a monolithic FSMD that does not include post-processing needed such as the scaling operation for the square root. The FSMD for the CORDIC uses Q2.14 fixed-point arithmetic. The core achieves 18 (CIRCULAR, LINEAR) and 19 cycles (HYPERBOLIC) per sample or n + 4 and n + 5 cycles, respectively, where n is the fractional bitwidth. A single-cycle per iteration constraint imposes the use of distributed LUT RAM, otherwise 3 cycles are required per sample (distinct load, compute, store cycles).

All design files except cordic.c, cordic.nac, and cordic_test_data.txt have been automatically generated using HercuLeS HLS ( . The original cordic.vhd has been optimized via (manual) operation chaining. operpack.vhd,
std_logic_textio.vhd are simulation/synthesis library files, copyrighted by their respective authors.

IMPORTANT: Please go through the license agreement (CORDIC-EULA.txt) to ensure proper use of the CORDIC IP CORE.

For documentation, consult the README, README.html, README.pdf files in /doc.

SPECIAL THANKS: Go to MSc and PhD candidate Mrs. Vasiliki Giannakopoulou for explaining to me how CORDIC works and for implementing a hand-coded optimized version to compare with! Her hand-written CORDIC is also blazing fast for a portable non-Xilinx or non-Altera specific design.