Xanthopoulos, Constantinos

Hicks, Matthew

Almansa, Javier

Yawn, Nathan

Jayar, Ramkumar

Fajardo, Raul

minsoc

the bug is related to 
http://opencores.org/bug,view,381

the first bit transmitted by SPI is wrong

Hi,

I'm a newbie and trying to port MinSoC to De2-115 board from Altera for a MSc project.

When we try to synthesize the design using Altera QSys/SoPC Builder, we get a syntax error in the minsoc_onchip_ram.v module (at line 122) although syntactically there's nothing wrong. We've already included the minsoc_defines.v  file.

Can anyone enlighten us on where we're going wrong?

Regards,
AR

Syntax error in minsoc_onchip_ram.v (122) ...

A specific problem with the frequency 12.5 MHz has been noticed, for which the SoC delivers weird characters on the terminal output.  

This has been detected as an error caused by a truncation operation.

The system baudrate is configured by a register in the uart module from the SoC. The formula is:

    value = sys_clk/(16*desired_baud_rate)

For 25MHz system clock this is 13.56. Truncating to 13, it leads to a real baudrate of 120,192.3 bps.
For 12.5MHz system clock this is 6.78. Truncating to 6, it leads to a real baudrate of 130.208,3 bps.

This skew to the real baudrate of 115200 is responsible for the weird characteres. If you round it up to 7 you get a real baudrate of 111,607.14 which happens to work.

That truncation is executed by the file sw/support/uart.c line 45. If you remove the calculation and directly type in the rounded value, 7 here, it will work flawlessly.

I know this happens to be a somewhat obvious. But since the system is hiding the baudrate configuration from the user, by calculating it directly from system clock and desired baudrate inputs, it is important to make clear that these things might show up, and that this is the way to get rid of these errors. 

Greetings,
Raul

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