OpenCores

Details

Name: orga-small-system
Created: Sep 4, 2021
Updated: Sep 6, 2021
SVN: No files checked in
Bugs: 0 reported / 0 solved
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Other project properties

Category:System on Chip
Language:Verilog
Development status:Stable
Additional info:
WishBone compliant: No
WishBone version: n/a
License: Others

OrgaSmallSystem

This is an system-on-chip implementation for a very small processor (8 bits). It was design for educational purposes. Using this tool, you could explain the instruction cycle, how works a data path or even how to design a new instruction.

  • Von Neumann Architecture, instructions and data in the same memory.
  • 8 general purpose registers.
  • One special register por program counter.
  • Word size and bus 8 bits. Instructions 16 bits.
  • Microprogramed design.

Only version with interrupt:

  • Support for 3 in-out ports, two ports for input, and one port for output.
  • One interrupt for detect changes in one input port.

For more information, read the documentation (for now is only in spansh, I will try traslate it).

GITHUB: https://github.com/fokerman/microOrgaSmall

The url of the svn repository is: https://opencores.org/websvn/listing/orga-small-system/orga-small-system