mihad

Markovic, Tadej

PCI bridge

## Links to related sites and documents

\- [PCISIG organization](http://www.pcisig.com) - [Xilinx PCI main page](http://www.xilinx.com/pci/index.htm) - [Xilinx pci core documents](http://www.xilinx.com/products/logicore/coredocs.htm) - [Altera MegaCores](http://www.altera.com/html/mega/megastore-home.html) - [Altera PCI design note](http://www.altera.com/document/sig_ug/pcic_ug.pdf) - [http://www.altera.com/html/literature/lconf.html](http://www.altera.com/html/literature/lconf.html) - [http://www.altera.com/html/literature/lsb.html](http://www.altera.com/html/literature/lsb.html) - [http://www.altera.com/html/literature/lug.html](http://www.altera.com/html/literature/lug.html)

## Links to other OpenCores PCI projects

\- [PCI Blue Interface (Verilog) by Blue Beaver](http://www.opencores.org/cvsweb.shtml/pci_blue_interface/) - [PCI parity module (VHDL) by Jamil Khatib](http://www.opencores.org/cvsweb.shtml/pci_core/) - [PCI behavioral modules (VHDL) by Ovidiu Lupas](http://www.opencores.org/cvsweb.shtml/pci_core/vhdl_behav/)


<h2 id="links-to-related-sites-and-documents">Links to related sites and documents</h2>
<p>- <a href="http://www.pcisig.com">PCISIG organization</a>
- <a href="http://www.xilinx.com/pci/index.htm">Xilinx PCI main page</a>
- <a href="http://www.xilinx.com/products/logicore/coredocs.htm">Xilinx pci core documents</a>
- <a href="http://www.altera.com/html/mega/megastore-home.html">Altera MegaCores</a>
- <a href="http://www.altera.com/document/sig_ug/pcic_ug.pdf">Altera PCI design note</a>
- <a href="http://www.altera.com/html/literature/lconf.html">http://www.altera.com/html/literature/lconf.html</a>
- <a href="http://www.altera.com/html/literature/lsb.html">http://www.altera.com/html/literature/lsb.html</a>
- <a href="http://www.altera.com/html/literature/lug.html">http://www.altera.com/html/literature/lug.html</a></p>
<h2 id="links-to-other-open-cores-pci-projects">Links to other OpenCores PCI projects</h2>
<p>- <a href="http://www.opencores.org/cvsweb.shtml/pci_blue_interface/">PCI Blue Interface (Verilog) by Blue Beaver</a>
- <a href="http://www.opencores.org/cvsweb.shtml/pci_core/">PCI parity module (VHDL) by Jamil Khatib</a>
- <a href="http://www.opencores.org/cvsweb.shtml/pci_core/vhdl_behav/">PCI behavioral modules (VHDL) by Ovidiu Lupas</a></p>


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PCI bridge

Links to related sites and documents

Links to other OpenCores PCI projects