Quadrature Decoder / Counter

Project maintainers


Name: quadraturecount
Created: Dec 23, 2003
Updated: Apr 22, 2004
SVN Updated: Mar 10, 2009
SVN: Browse
Latest version: download (might take a bit to start...)
Statistics: View
Bugs: 0 reported / 0 solved
Star1you like it: star it!

Other project properties

Category:Communication controller
Development status:Stable
Additional info:FPGA proven
WishBone compliant: No
WishBone version: n/a
License: GPL


This is a very simple project for reading a quadrature device, such as an optical encoder. The counter is initialized to zero, and then counts up and down when valid quadrature is present at the inputs


- Simple VHDL for beginners; well documented; shows use of hierarchical design.
- Count limited only by bit length of counter vector; simple to count very large values
- VHDL Implementation of Xilinx application note #012 (xapp012.pdf)
- NPL project file for immediate evaluation in Xilinx ISE/Webpack tools
- Questions/Comments:

Project Contents

- QuadratureCounter.vhd, top-level VHDL
- QuadratureDecoder.vhd, sub-level file
- Quadrature.npl, Xilinx project file for ISE/Webpack
- Quadrature.ucf, optional constraints file for pin assignment