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Details

Name: robust_ahb_matrix
Created: Apr 13, 2011
Updated: Sep 21, 2013
SVN Updated: Jul 3, 2011
SVN: Browse
Latest version: download (might take a bit to start...)
Statistics: View
Bugs: 1 reported / 0 solved
Star0you like it: star it!

Other project properties

Category:System on Chip
Language:Verilog
Development status:Alpha
Additional info:
WishBone compliant: No
WishBone version: n/a
License: LGPL

Description

Generic AHB matrix. It is a multi-master, multi-slave non-blocking AHB matrix with round-robin arbitration. Builds Verilog AHB matrices according to input parameters: master number, slave number, data bits, etc. The source files are written in RobustVerilog, a free RobustVerilog parser can be downloaded from http://www.provartec.comedatools

Generic AHB master stub
http://opencores.orgproject,ahb_master

Generic AHB slave stub
http://opencores.orgproject,ahb_slave