Generic AHB matrix. It is a multi-master, multi-slave non-blocking AHB matrix with round-robin arbitration. Builds Verilog AHB matrices according to input parameters: master number, slave number, data bits, etc. The source files are written in RobustVerilog, a free RobustVerilog parser can be downloaded from http://www.provartec.comedatools
Generic AHB master stub
http://opencores.orgproject,ahb_master
Generic AHB slave stub
http://opencores.orgproject,ahb_slave