Clayton, John

RS232 system controller

Hi

what are these package files in vhdl ?

where is top

I was using vhdl version 

and I added
qty_sr    <= to_unsigned(1,qty_sr'length);
in two places

becasue 

write commad (without qty fields) sets
qty_sr
to the limit, a then if read is done without qty fields then it reads a whole block

here what I did:

first place
###########
      when GET_ADR_FIELD =>
        if (sys_clk_en='1') then
          if (char_is_hex='1') then
            adr_sr    <= adr_sr(NIBBLE_SIZE*(ADR_DIGITS-1)-1 downto 0) & hex_digit;
            cmd_ptr   <= cmd_ptr+1;
          elsif (char_is_whitespace='1') then -- Normal exit
            fsm_state <= SCAN_DAT_WHITESPACE;
          elsif (cmd_char=ENTER_CHAR) then
         
        --added
        --added
            qty_sr    <= to_unsigned(1,qty_sr'length);
        --added
        --added

            fsm_state <= START_EXECUTION; -- Using last values
          else
            msg_pointer <= "01010";    -- Address of message
            fsm_tx_load <= '1';
            fsm_state   <= SEND_QUESTION;
          end if;
        end if;
#############

second place
###########
      when SCAN_QTY_WHITESPACE =>
        if (sys_clk_en='1') then
          if (char_is_whitespace='1') then
            cmd_ptr   <= cmd_ptr+1;
          elsif (cmd_char=ENTER_CHAR) then
        --added
        --added
            qty_sr    <= to_unsigned(1,qty_sr'length);
        --added
        --added

            fsm_state <= START_EXECUTION; -- Using last values
          else
            fsm_state <= GET_QTY_FIELD;
            qty_sr    <= to_unsigned(0,qty_sr'length);
          end if;
        end if;
###########

this way the "last values" are never used
but it is clumsy

more likely rs_syscon is used with qty_fileds leaved blank, so this idea fits well

BTW
verilog version had such feature?

VHDL RS_SYSCON

Hi,

When I press "enter" key, I can get "0123456789ABCDEF".
However, when I input "i" with enter, or even "r 8000", "w 8000 00",
I always get "C?" which means command parsing fail.
I use Lattice XP2 to run your verilog code.

Thanks,
JC

Commands not recognized

I use the syscon with the little risc processor.
My target is an apex20ke altera fpga. 
Il  noticed syscon hangs up when the  rs232_rxd_i pin is not cloked in with clk_i. For more reliability i have chocked out rs232_txd_o with clk_i too. 
A second issue is the auto_baud_with_tracking. When i try to send big command text file through hyperterminal, syscon loses the transmit clock. I have replaced auto_baud_with_tracking by auto_baud and it works perfectly.
I find syscon very useful and thanks you for your job !!!!!
Best regards
jerome Penot

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RS232 system controller