RS232
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Details
Name: rs232_with_buffer_and_wb
Created: Jan 13, 2013
Updated: Sep 11, 2013
SVN Updated: Jan 30, 2013
SVN: Browse
Latest version: download (might take a bit to start...)
Statistics: View
Bugs: 2 reported / 0 solved
Created: Jan 13, 2013
Updated: Sep 11, 2013
SVN Updated: Jan 30, 2013
SVN: Browse
Latest version: download (might take a bit to start...)
Statistics: View
Bugs: 2 reported / 0 solved
Star9you like it: star it!
Other project properties
Category:Communication controller
Language:VHDL
Development status:Alpha
Additional info:
WishBone compliant: Yes
WishBone version: n/a
License: LGPL
Language:VHDL
Development status:Alpha
Additional info:
WishBone compliant: Yes
WishBone version: n/a
License: LGPL
Description
Two wire RS232 communication module capable of 5, 6, 7, 8 bit word communication, Parity bit, Parity bit Polarity, 1 and 2 stop bits. Integrated with transmit and receive buffer controlled through a WishBone interface. Besides the WishBone interface auxiliary signals are provided for Buffer status and can be used for interrupt driven routines.
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