OpenCores

Signal Waveform Generator

Project maintainers

Details

Name: signal_waveform_generator
Created: Feb 4, 2025
Updated: Feb 6, 2025
SVN Updated: Feb 6, 2025
SVN: Browse
Latest version: download (might take a bit to start...)
Statistics: View
Bugs: 0 reported / 0 solved
Star0you like it: star it!

Other project properties

Category:Other
Language:VHDL
Development status:Beta
Additional info:
WishBone compliant: No
WishBone version: n/a
License: LGPL

SignalGenerator

This module implements a simple ROM-based Signal Generator Module with PWM. Selector allows to switch to several signal types:

  • Sine
  • Triangle
  • Sawtooth
  • Square

Architecture Overview

Usage

User specifies the signal waveform accuracy (depth & size of ROM) in bits, the expected frequency output and a frequence error range in Hz.

Signal Generator Pin Description

Generics

NameDescription
sys_clockSystem Input Clock Frequency (Hz)
waveform_addr_bitsROM Address Bits length
waveform_data_bitsROM Data Bits length
signal_output_freqPWM Signal Output Frequency (Hz)
signal_output_freq_errorRange of PWM Signal Output Error Range (Hz)

Ports

NameTypeDescription
i_sys_clockInputSystem Input Clock
i_resetInputReset ('0': No Reset, '1': Reset)
i_waveform_selectInputWaveform Generator Type Selector ("00": Sine, "01": Triangle, "10": Sawtooth, "11": Square)
o_signalOutputSignal Ouput Value