Simple implementation of FM Receiver to demodulate square wave signal modulated
in FM. This design uses PLL to demodulate FM modulated signal.
- Synthesizable
- This design can be synthesize using Xilinx 6.3i
- This design can be simulated and synthesized using http://asim.lip6.fr/recherche/alliance (Alliance 5.0)
- Simple
- Use it to understand PLL to see how FM Receiver works.
- Good for introduction in design process.
- Modular design, can be use for other design.