Created: Jan 3, 2005
Updated: Mar 19, 2010
SVN Updated: Jun 27, 2010
Latest version: download
(might take a bit to start...)
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Other project properties
Additional info:FPGA proven
WishBone compliant: No
WishBone version: n/a
Simple FM Receiver
Simple implementation of FM Receiver to demodulate square wave signal modulated
in FM. This design uses PLL to demodulate FM modulated signal.
- This design can be synthesize using Xilinx 6.3i
- This design can be simulated and synthesized using http://asim.lip6.fr/recherche/alliance (Alliance 5.0)
- Use it to understand PLL to see how FM Receiver works.
- Good for introduction in design process.
- Modular design, can be use for other design.
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