Design is simulated using ModelSim.
- Each module contains a ModelSim project
- Contain individual SystemVerilog test files
- Test wave (*.do) files to quickly set up views
Framework is also developed around the Fuse
tests (low-level Z80 CPU) that run
each Z80 instruction on the ModelSim and automatically compare to the expected Fuse
test result files. Mis-matches are flagged.
There is a "quick" sanity test as well as
a much longer comprehensive test.
assember is used to generate Z80 program test snippets which are then run
in the simulation and on the actual FPGA hardware. The resulting files should match.
This level of tests adds UART to the ModelSim and FPGA implementation so the tests can be
run and outputs compared.
- Tests for various complex instructions like DAA, NEG
- Classic "Hello, World" application
- Tests for interrupt behavior
- ...and more tests embedded in *.asm test files
Several complete and working FPGA designs illustrate implementation and test the A-Z80 on both Altera and Xilinx devices:
- Basic Computer using keyboard and UART to run Z80 tests
- Complete implementation of a Sinclair ZX Spectrum
tests on a Basic Computer implementation: