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SPIRX/SPITX IE1/IFG1 #28
Closed gallioleo opened this issue over 9 years ago
gallioleo commented over 9 years ago

Hello Everyone,

in the OMSP430 are the bits 7-5 and 3-1 reserved in register IE1 (0x0000) and IFG1 (0x0002). I write at the moment on an SPI module which implements the TIs SPI Module (only SPI mode). When I now connect this SPI IRQ to the corresponding channels, I can't use the Mask & Flag Register cause these bits are stucked by the HDL.

The belonging line in the verilog is omsp_sfr.v (line 189) assign ie1 = {3'b000, nmie, 3'b000, wdtie};

It is possible to disable/enable the IRQ Channel 4/5 (SPIRX/SPITX) with these two bits?

Thanks for your reponse!

Best Regards.

olivier.girard commented over 9 years ago

Hi Andreas,

As a general rule I prefer to avoid putting circuitry in the core which is specific to external peripherals that are really specific to the user needs.

IMO, it is probably better to make your SPI block self-contained and move these reserved bits in your peripheral.

However, if you absolutely want to keep 100% compatibility with TI MSP430 software using the SPI peripheral than feel free to edit to code to add the missing registers :-)

This is definitely allowed by the license :-)

Cheers, Oliv'

olivier.girard closed this over 8 years ago

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