The openMSP430 is a synthesizable 16bit microcontroller core written in Verilog. It is compatible with Texas Instruments' MSP430 microcontroller family and can execute the code generated by any MSP430 toolchain in a near cycle accurate way.
The core comes with some peripherals (16x16 Hardware Multiplier, Watchdog, GPIO, TimerA, generic templates), with a DMA interface, and most notably with a two-wire Serial Debug Interface supporting the MSPGCC GNU Debugger (GDB) for in-system software debugging.
While being fully FPGA friendly, this design is also particularly suited for ASIC implementations (typically mixed signal ICs with strong area and low-power requirements).
In a nutshell, the openMSP430 brings with it:
The complete tar archive of the project can be downloaded here (OpenCores account required).
The following SVN command can be run from a console (or GUI):
svn export http://opencores.org/ocsvn/openmsp430/openmsp430/trunk/ openmsp430
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Being fully compatible with the original MSP430 architecture, TI's official documentation is applicable: SLAU049F.PDF
In addition, the openMSP430 online documentation is also available in pdf.
Core:
ASIC friendly (options for full power & clock management support).
Small size (Xilinx: 1650 LUTs / Altera: 1550 LEs / ASIC: 8k gates).
Peripherals:
Core:
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Development has been performed using the following freely available (excellent) tools:
A few MSP430 links:
TI: a list of available MSP430 Open Source projects out there on the web today.
MSP430 is a trademark of Texas Instruments, Inc. This project is not affiliated in any way with Texas Instruments. All other product names are trademarks or registered trademarks of their respective owners.