OPL3 20 - Yamaha OPL3 FM Synthesizer - 20 years later
Project maintainers
Details
Name: opl3_20
Created: Nov 26, 2014
Updated: Jun 9, 2016
SVN: Check description below for external links
Bugs: 0 reported / 0 solved
Created: Nov 26, 2014
Updated: Jun 9, 2016
SVN: Check description below for external links
Bugs: 0 reported / 0 solved
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Other project properties
Category:Other
Language:Verilog
Development status:Stable
Additional info:Design done, FPGA proven, Specification done
WishBone compliant: No
WishBone version: n/a
License: LGPL
Language:Verilog
Development status:Stable
Additional info:Design done, FPGA proven, Specification done
WishBone compliant: No
WishBone version: n/a
License: LGPL
Description
Reverse engineered SystemVerilog RTL version of the Yamaha OPL3 (YMF262) FM Synthesizer chip. Design is complete and working on the Digilent ZYBO board.
See it in action:
https://www.youtube.comwatch?v=KoSF4ZoDuRI
https://www.youtube.comwatch?v=i9vEKyJScYw
GitHub:
https://github.com/gtaylormbopl3_fpga
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