Project maintainers


Name: system05
Created: Sep 9, 2003
Updated: Apr 7, 2008
SVN Updated: Mar 10, 2009
SVN: Browse
Latest version: download (might take a bit to start...)
Statistics: View
Bugs: 0 reported / 0 solved
Star0you like it: star it!

Other project properties

Category:System on Chip
Development status:Beta
Additional info:FPGA proven
WishBone compliant: No
WishBone version: n/a
License: GPL


6805 compatible CPU Core. Does not have any of the standard 6805 on chip peripherals at this stage other than the parallel I/O port. This was the first of the 68xx processors I attempted and have only just got around to completing it.. The Home Page for the project is Here


- 6805 compatible core
- 4 x 8 bit Parallel I/O ports
- Dual 8 bit Timer
- MiniUART compatible with 6850 ACIA.
- Runs with an E clock of 12.5MHz and system clock of 25MHz


- Prints out "Hello World" and waits for an input character
- Implemented on B5-X300 Spartan 2e board
- Needs to include a Multiply instruction to be compatible with the C8