PDP-11/70 CPU core and SoC

Description

The project contains a complete DEC PDP-11 system: a PDP-11/70 CPU with memory management unit, but without floating point unit, a complete set of mass storage peripherals (RK11/RK05, RL11/RL02, RK70/RP06, TM11/TU10) and a basic set of UNIBUS peripherals (DL11, LP11, PC11), and last but not least a cache and memory controllers for SRAM and PSRAM. The design is FPGA proven, runs currently on Digilent Arty , Basys3 , Nexys4 , Nexys3 , Nexys2 and S3board boards and boots 5th Edition UNIX and 2.11BSD UNIX.

This is a retrocomputing project, rebuilding hardware from the late 70s and running historical software.

News 2016-12-11:

• The project has moved to GitHub: https://github.com/wfjm/w11
• The project pages have move to GitHub Pages: https://wfjm.github.io/home/w11/

Milestones

Being a 'leisture time project' things evolve at a modest pace. Key milestone so far were:

•	Dec-2016:		The project has moved to GitHub: https://github.com/wfjm/w11
•	Jun-2015:		added RH70 + RP/RM disks; TM11/TU10 tapes; now complete mass storage system
•	Mar-2015:		use Vivado; Artix-7 ports added (for Basys3 and Nexys4); added RL01/RL02 disks
•	Apr-2013:		new C++/Tcl backend server, w11a designs operate with rlink over USB
•	Jan-2012:		Cypress FX2 USB controller support added, rlink and config over USB.
•	Dec-2011:		Spartan-6 port of w11a added (for Digilent Nexys3 board).
•	Jul-2010:		OpenCores project w11 created; w11a V0.5 tagged and released.
•	May-2010:		w11a systems ported to Digilent Nexys2 board; lots of cleanup.
•	Sep-2009:		2.11BSD UNIX boots to multi-user mode on w11a on FPGA.
•	Aug-2009:		UNIX 5th Edition boots on w11a on FPGA.
•	Jun-2009:		Found 11/70MP system manual on bitsavers. Most of IIST implemented. Too early, but fun.
•	Dec-2008:		Finished the last of three 2.11BSD patches, now 2.11BSD boots of a RK05 disk set and runs on a 11/70 without FPP in simh.
•	Mar-2008:		Full system with CPU, cache, and minimal I/O system runs on FPGA.
•	Sep-2007:		rri (rbus+rlink) implemented, w11a runs on FPGA (Digilent S3BOARD).
•	Sep-2006:		CPU and MMU implemented, simple test codes run.
•	Jun-2006:		Re-discovered a pile of PDP-11 manuals in a forgotten box full of old paper work. This triggered the idea, and with simh, ghdl and bitsavers at hand, 2.11BSD as target OS and a 11/74 picture as desktop background it quickly became a project.

Releases

The project has moved to GitHub: https://github.com/wfjm/w11

Release prior to October 2016 stay available on OpenCores for documentation. Major releases are tagged on svn, minor and micro releases are denoted only via the svn revision.

Release	Date	svn tag	svn rev	README		Comment
w11a_V0.74	2016-10-15	w11a_V0.74	37	README		upgraded CRAM controller; new test bench driver
w11a_V0.73	2016-06-26	-	36	README		Code cleanup for vivado, more xsim support. Size-configurable cache, better w11a performance.
w11a_V0.72	2016-03-19	-	35	README		port of w11a to Arty; support for XADC; initial vivado xsim support
w11a_V0.71	2015-12-30	-	34	README		Add CPU debug and monitoring units (dmhbpt,dmscnt,dmcmon)
w11a_V0.7	2015-06-21	w11a_V0.7	33	README		from 0.6 -> 0.7: revised rbus protocol; Vivado support; Nexys4 and Basys3 port; RP/RM and RL11 disk and TM11 tape support
w11a_V0.66	2015-06-05	-	31	README		Support TM11/TU10 tapes
w11a_V0.65	2015-05-14	-	30	README		Support RH70 + RP/RM big disks
w11a_V0.64	2015-03-09	-	29	README		Support for Vivado; port of w11a to Basys3 and Nexys4; RL01/RL02 disks
w11a_V0.63	2015-01-04	-	28	README		w11a rbus interface and C++/Tcl backend now use rlink v4 features, much reduced number of round trips
w11a_V0.62	2014-12-20	-	27	README		Introduced rlink protocol v4 (see README_Rlink_V4)
w11a_V0.61	2014-08-10	w11a_V0.61	25	README		Bugfix for DIV instruction (see ECO-026-div); other minor fixes
w11a_V0.6	2014-06-06	w11a_V0.6	23	README		from 0.5 -> 0.6: revised ibus and rbus protocol; backend server rewritten; Nexys3 port; Cypress Fx2 support; LP11,PC11 support
w11a_V0.581	2014-05-29	-	22	README		Fixes for ISE 14.7; Spartan-6 CMT support; more man pages
w11a_V0.58	2013-05-12	-	21	README		LP11,PC11 support added; old backend retired; operating system kits re-organized
w11a_V0.57	2013-04-27	-	20	README		w11a systems with rlink over USB on nexsy2 and nexsy3 boards
w11a_V0.562	2013-04-13	-	19	README		Phase 2 of new C++/Tcl backend, add cpu and first device support; add asm-11 assembler
w11a_V0.561	2013-01-06	-	18	README		Add bugfixes, Cypress FX2 simulation model, and test designs for Nexys3 and Atlys boards
w11a_V0.56	2013-01-02	-	17	README		Add Cypress FX2 USB interface controller; FX2 firmware supporting jtag access and data transfer; test system for rlink over USB verification
w11a_V0.55	2011-12-23	-	16	README		Add xon/xoff (software flow control) support to serport library; Add test design for serport verification
w11a_V0.54	2011-12-04	-	15	README		Add Nexys3 port of w11a
w11a_V0.532	2011-11-20	-	14	README		Add test design for 'human I/O' interface; migrate to use numeric_std
w11a_V0.531	2011-09-12	-	12	README		Prepare upcoming support for Spartan-6 (nexys3 and atlys) and Cypress FX2 USB (nexys2/3 and atlys)
w11a_V0.53	2011-04-17	-	11	README		Introduced new backend written in C++ and Tcl. Phase 1 with functionality to execute simple test benches
w11a_V0.52	2011-01-02	-	9	README		Introduced rbus protocol V3; reorganize rbus and rlink modules, many renames
w11a_V0.51	2010-11-28	-	8	README		Introduced ibus protocol V2; Nexys2 systems use DCM; sys_w11a_n2 now runs with 58 MHz
w11a_V0.5	2010-07-23	w11a_V0.5	7	README		Initial release: w11a CPU core; basic set of peripherals: kw11l, dl11, lp11, pc11, rk11/rk05; two complete systems for Digilent S3BOARD and Nexys2