The Xenie is a product family of highly integrated FPGA modules that includes the Xilinx® Kintex7® FPGA and 10Gbit Ethernet Marvell Alaska X 88X3310P PHY on a single board. The module is fully programmable to provide “Any to Ethernet” high performance connectivity. On the line side, the PHY supports the following protocols 10GBASE-T, 5GBASE-T, 2.5GBASE-T, 1000BASE-T, 100BASE-TX and 10BASE-Te.
The PHY is compatible with the IEEE 802.3an, IEEE 802.3bz standards, NBASE-T™ Specification and supports IEEE802.1ae MACsec protocol and PTP functionality with IEEE 1588 v2. PTP time-stamp processing.
The FPGA's MGT lines support rates up to 12.5Gbit. The module is equipped with 1 GByte of DDR3L SDRAM and 32 MByte of Flash memory as a storage for configuration bitstream. Six GTX multi-gigabit transceivers and three full FPGA I/O banks (in total 150 single-ended I/O or up to 72 differential pairs) with configurable IO voltage are available via two high-speed, high-pin-count, board-to-board connectors. All other necessary supporting circuitry, like clock oscillators and voltage regulators are placed on module, requiring the user to attach literally only connectors and a single DC power supply.
|Logic cells||65 600||162 240|
|Block RAM (36Kb)||135||325|
|DDR3L max. data rate||667 Mb/s||1066 Mb/s|
|GTX max. data rate||6.6 Gb/s||10.3125 Gb/s|
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