Gutschmidt, Jens

cpu6502_tc - R6502 Processor Soft Core with accurate timing

All Branch Instructions 
  (BCC, BCS, BEQ, BNE, BPL, BMI, BVC, BVS)
  4 cycles if branch forward occur and the branch
  instruction lies on a xxFEh location.
  Must be 3 cycles course it is a SAME PAGE Branch.

ALL branches - incorrect timing if a forward branch occurs

If a RESET, NMI or IRQ occurs, no SYNC signal is generated.

RESET & INTs not generating a SYNC signal

(Found by user)

The flag "Overflow" / "V" (Bit 6 in the Processor Status Register) is computed wrong in op codes "ADC" and "SBC".
This flag was not 100% tested in my test environment in the past. Also this flag is rarely used by available software e.g for APPLE}{.
The erroneous code segment lies in the block "fsm_execution_unit".

Will be corrected in the next upcoming production release as soon as possible.

ADC & SBC: Overflow Flag wrongly computet

hi
can u pls help me out in making 64 bit cpu?
if u have any kind of knowledge about dis den pls helpme....
my id is
swapna6688@gmail.com
thanx

Untitled bug

nmi,irq bug report 
by hwt69
email: ****
data: 2010-2-7.
-------------------------------------
project details
1,core nanme : cpu6502_tc
               cpu6502_true_cycle
2,Language   : vhdl
3,OS: windows xp professional sp3
4,cpu6502_tc IP CORE VER: 
-- VHDL Entity R6502_TC.R6502_TC.symbol
--
-- Created:
--          by - eda.UNKNOWN (ENTWICKL4-XP-PR)
--          at - 11:47:57 23.02.2009
--
-- Generated by Mentor Graphics' HDL Designer(TM) 2007.1a (Build 13)
5, MAIN FILE DATE : 2009-2-16

------------------------------------------
my project run good:
1,use actel AFS600
2,use vhdl program
3,My project is completey nearly
4,My project is run OK, but IRQ,NMI,result in keyboard is not work.
--------------------
bug report
1,I found NMI,IRQ run ERROR, they break instructions currently. so subroution return error 

posiontion. program run over!
2,IRQ have others error,I am not understand.
3, add some Figure to you. 
4. file name:
   nmi_stack_in.bmp,
   nmi_stack_out.bmp,
   irq_stack_in.bmp,
   irq_stack_out.bmp.

NMI,IRQ BUB

1. After removing some unused nets and registers, the whole design was optimized. So the signal "rd_o" was corrupted while this action. I use only signal "wr_n_o" to control the read/write flow for my FPGA-APPLE][+. In result of this, the error was not occour at the produktion test.

I noticed this error by the way by doing some simulations for the next point.

2. OP "JMP (indirect)" produced a 65C02 like jump. On 6502 a special case exist when the "(indirect)" address cross the page boundary (e.g. "JMP (02FF)" reads from $02FF and $0200, instead of $02FF and $0300)

Signal

The implementation of the interrupt instruction BRK and hardware signals IRQ / NMI is incorrect and will produce incorrect results and/or hang the core in every case.

See below for more information about that.
Bugs are now fixed in the new release (17-Apr-2008).

BRK:
- Stack Pointer incorrectly grows up - not down
- The "B" flag is not set and stacked up
- Writing to the stack produce misalligned relationchip between addresses and data

IRQ:
- Stack Pointer incorrectly grows up - not down
- Writing to the stack produce misalligned relationchip between addresses and data

NMI:
- Stack Pointer incorrectly grows up - not down
- Writing to the stack produce misalligned relationchip between addresses and data

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cpu6502_tc - R6502 Processor Soft Core with accurate timing