HIVE - a 32 bit, 8 thread, 4 register/stack hybrid, pipelined verilog soft processor core
This page contains files uploaded to the old opencores website as well as images and documents intended for use on other pages in this project. If you want to download this project or browse its svn, you can do so at the overview-page.
| Description | Link-tag | Download | Date |
| Hive design document | Show | Link | 2013-06-23 11:25 |
| Title | Show | Link | 2013-07-07 18:02 |
| Hive design document | Show | Link | 2013-07-07 18:04 |
| Hive design document v04.05 | Show | Link | 2014-01-06 16:33 |
| Title | Show | Link | 2014-06-08 02:45 |
| Hive design document v05.03 | Show | Link | 2014-06-08 02:46 |
| Hive design document v06.01 | Show | Link | 2014-09-16 13:22 |
| Hive design document v08.06 | Show | Link | 2015-09-07 14:11 |
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