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5x4Gbps CRC generator designed with standard cells

## Description

A 32-bit parallel and highly pipelined Cyclic Redundancy Code (CRC) generator is presented. The design can handle 5 different channels at an input rate of 2Gbps each (the total output throughput is 5x4Gbps.)  
  
The generated CRCs are compatible with the 32-bit Ethernet standards. The circuit has been implemented with standard cells in a 0.35Micron standard CMOS process using the properties of Galois Fields and has been conceived as a "free" IP.

## Features

\- 5 independent channels @ 4Gbps each  
\- Works (simulations) with a standard AMS 0.35Micron process

## Status

\- Ready to use.


<h2 id="description">Description</h2>
<p>A 32-bit parallel and highly pipelined Cyclic Redundancy Code (CRC) generator is presented. The design can handle 5 different channels at an input rate of 2Gbps each (the total output throughput is 5x4Gbps.) <br />
<br />
The generated CRCs are compatible with the 32-bit Ethernet standards. The circuit has been implemented with standard cells in a 0.35Micron standard CMOS process using the properties of Galois Fields and has been conceived as a "free" IP. </p>
<h2 id="features">Features</h2>
<p>- 5 independent channels @ 4Gbps each<br />
- Works (simulations) with a standard AMS 0.35Micron process</p>
<h2 id="status">Status</h2>
<p>- Ready to use.</p>


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5x4Gbps CRC generator designed with standard cells

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