OpenCores

T48 µController

Improve test bench around Memory functionality Request

#17 opened over 16 years by ocghost

Deassertion of PROG too early Bug

#16 opened about 18 years by arniml

P2 Port value restored after expander access Bug

#15 opened over 18 years by arniml

PROBLEM WHEN INT AND JMP Bug

#14 opened over 18 years by prandini

Target address of JMP to Program Memory Bank 1 corrupted by interrupt Bug

#13 opened almost 19 years by arniml

Return address of CALL to Program Memory Bank 1 corrupted by interrupt Bug

#12 opened almost 19 years by arniml

MSB of Program Counter changed upon PC increment Bug

#11 opened about 19 years by arniml

Wrong clock applied to T0 Bug

#10 opened over 19 years by arniml

RD' and WR' not asserted for INS A, BUS and OUTL BUS, A Bug

#9 opened almost 20 years by arniml

P1 constantly in push-pull mode in t8048 Bug

#8 opened almost 20 years by arniml

PSENn Timing Bug

#7 opened almost 20 years by ocghost

Program Memory bank can be switched during interrupt Bug

#6 opened about 20 years by arniml

Wishbone interface Idea

#5 opened about 20 years by arniml

Add a synthesizable 8243 Port Expander Idea

#4 opened about 20 years by arniml

External Program Memory ignored when EA = 0 Bug

#3 opened about 20 years by arniml

ANL and ORL to P2 read port status instead of port output register Bug

#2 opened about 20 years by arniml

Counter is not incremented Bug

#1 opened about 20 years by arniml

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