Public Profile of Admin, OpenCores

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Username	ocadmin
Fullname	Admin, OpenCores
Email	ocadmin@openco... (@opencores.org)
City	Amsterdam
Country	Netherlands
Extended Profile	ocadmin
Twitter	opencores_org
Reddit	OpenCores

Projects 3

Starred projects 6

Submitted bugs 57

Open 40

Open Etherblade.net - FPGA ethernet line-rate encapsulator (EoIP, EoMPLS, PBB etc) — clarify the purpose of this project

Open Complex Multiplier — clarify the purpose of this project

Open Chip-to-chip authentication with PUF and RSA — clarify the purpose of this project

Open AES-VHDL — mirror repository on OC

Open A lightweight 8085 verilog implementation — mirror repository on OC

Open OpenRISC 1000 (old) — test ignore

Open OpenRISC 1000 (old) — ignore test

Open OV7670 Camera Video Capturing — Could you clarify the purpose of this project?

Open Generic AXI DMA — version files in SVN

Open VLIW Processor — version files in SVN

Open Taar Microprocessor — version files in SVN

Open ODESS Multicore Project — version files in SVN

Open SATA 2 HOST Controller — version files in SVN

Open simpleUart - — version files in SVN

Open Boost Converter — clarify the purpose of this project

Open MaSoCist Soc builder/simulator — mirror repository on OC

Open SpaceWireSystemC — clarify the purpose of this project

Open myBlaze — Add more documentation

Open EtraxFS & Xilinx FPGA dev board with building blocks — clarify the purpose of this project

Open DDR2 — version files in SVN

Open 32 bit Processor — add more info about your project

Open EBU/spdif to I2S project — add more info about your project

Open Ethernet Switch on Configurable Logic — this project needs a maintainer!

Open or1200_soc — Status of this OpenRISC 1200 implementation

Open Hardware implementation of SHA-3 (keccak) algorithm — version files in SVN

Open 8 bit Vedic Multiplier — add more info about your project

Open 4-bit system — add more info about your project

Open 16x2_lcd_display — add more info about your project

Open BTC-FPGA-MINER - Open Source FPGA Bitcoin Miner — add more info about your project

Open 6502VHDL — add more info about your project

Open ZTEX USB-FPGA Module 2.14 — clarify the purpose of this project

Open SocExplorer — version files in SVN

Open Cray-2 Reboot — mirror repository on OC

Open c - VHDL Co-Simulation with FLI — mirror repository on OC

Open Another SPI Controller (with FIFO) — version files in SVN

Open ahci — add more info about your project

Open ahci — mirror repository on OC

Open spigpio — add more info about your project

Open SBA - Simple Bus Architecture — clarify the purpose of this project

Open Plataforma de Hardware Reconfigurable — translate your project

Closed 17

Closed FlexGripPlus General Purpose Graphics Processing Unit (GPGPU) core — mirror repository on OC

Closed LCD to HDMI output IP — Could you consider mirroring your project on the OC svn?

Closed Multiply-Accumulate Operation (MAC) — version files in SVN

Closed HDL-deflate — version files in SVN

Closed Featherweight RISC-V — mirror repository on OC

Closed Attiny Atmega Xmega core — version files in SVN

Closed NEO430 Processor (MSP430-compatible) — Are you still having problems with SVN?

Closed WISHBONE Bus Specifications — clarify the purpose of this project

Closed OpenRisc 1200 HP, Hyper Pipelined OR1200 Core — status of this project

Closed H2 Forth SoC — proper versioning of sources in SVN

Closed i8080 compatible processor using Am29XX bit slice family and microcoded design — version files in SVN

Closed S80186 — Feedback on the project

Closed CCSDS RX_TX_SoC — this is not a valid project

Closed AVALON/WISHBONE — add more info about your project

Closed Qaztronic's libraries — add more info about your project

Closed System-On-Chip based on bare Rocket-chip (RISC-V ISA) — mirror repository on OC

Closed Test Project — test of bug

Forum posts 76

76 posts in 5 forums

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Public Profile of Admin, OpenCores

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