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Public Profile of Zhang, Sai
Info
Username
Szhang_2002
Fullname
Zhang, Sai
Email
Szhang_2002@openco... (@opencores.org)
Country
China
Starred projects
1
10_100_1000 Mbps tri-mode ethernet MAC
Submitted bugs
29
Open
24
Open
Radix-4 Reciprocal Square Root, Division and Square Root IP Core — No files
Open
UART to Bus — Parameter Calculation Formula Questions
Open
vhdl core of IC6821 — ERROR
Open
8080 Compatible CPU — Typo in m8080.v and sm8080.v
Open
openMSP430 — Incorrect cycle length for CALL #N
Open
Generic Booth Multiplier — downloaded file is empty
Open
a VHDL 16550 UART core — RX Fifo Counter
Open
BTCMiner - Open Source Bitcoin Miner — Syntax Errors inside "sha_256_pipes2.v file"
Open
SPI Verilog Master & Slave modules — Issue when implementing on Double FPGA
Open
SHA3 (KECCAK) — SHA 3-512: This verilog code is not providing correct Hash code. Request for Correct Hash Code
Open
CPU Lecture — Compiled Code to Manipulate Array Breaks CPU
Open
AES — AES Decryption
Open
PCI bridge — PCI bridge license
Open
CAN Protocol Controller — CAN protocol controller license
Open
Next186 SoC PC — Some enhancements
Open
Simple UART for FPGA — Tx Doubled First Byte
Open
MC6803/6801 CPU — Undocumented opcode support
Open
1G eth UDP / IP Stack — IPv4_RX.vhd erroneously accepts if any part of IP address is 0xff
Open
Basic RSA Encryption Engine — Download and browse fail
Open
AES — AES Code
Open
NanoBlaze: the expandable processor — Syntax error - file nanoProcessor
Open
SHA3 (KECCAK) — Hash not work correctly as SHA3-512
Open
System09 — Download Link is Broken (Case Sensitive, should be System09 not system09)
Open
SPI Master/Slave Interface — i need more than one slave select wt modification should be done ?
Closed
5
Closed
cpu65c02_tc - R65C02 Processor Soft Core with accurate timing — VP
Closed
NoC based MPSoC — Installaion Problem
Closed
FT816Float - Floating point accelerator — module vtdl missing ?
Closed
RV01 RISC-V core — pkg missing
Closed
Attiny Atmega Xmega core — PULLUP seems to be not defined
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