Public Profile of Stark, Int
Info
| Username | IntStark |
| Fullname | Stark, Int |
| IntStark@openco... (@opencores.org) | |
| Country | China |
Starred projects 35
- 10/100M Ethernet-FIFO convertor
- 16x2_lcd_display
- 8b10b Encoder/Decoder
- APB to SPI
- APB to I2C
- Asynchronous SPI master
- Async 8b/10b enc/dec
- CF Cordic
- CF LDPC Decoder
- CORDIC core
- 10_100_1000 Mbps tri-mode ethernet MAC
- 10G Ethernet MAC
- Hilbert Transformer
- I2C master/slave Core
- JPEG Encoder Verilog
- JPEG Decoder
- JTAG Master
- 802.3an LDPC Decoder
- 802.3an LDPC Encoder
- SATA Controller
- OFDM modem
- Documented Verilog UART
- Quad SPI Flash Controller
- Generic AHB matrix
- Generic AXI to AHB bridge
- Generic AXI to APB bridge
- RS232
- SD/MMC Controller
- Another SPI Controller (with FIFO)
- TCP IP Core
- TCP/IP socket
- UART To SPI
- UDP/IPv4 for 10G Ethernet
- UDP/IP Core
- USB-FPGA Module 2.16
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