Public Profile of xjn, guiji
Info
| Username | guijixjn |
| Fullname | xjn, guiji |
| guijixjn@openco... (@opencores.org) | |
| Country | China |
Starred projects 29
- 1000BASE-X IEEE 802.3-2008 Clause 36 - Physical Coding Sublayer (PCS)
- 1G Ethernet DPI
- 8b10b Encoder/Decoder
- BiRiscV - 32-bit dual issue RISC-V CPU
- CAN Protocol Controller
- CF LDPC Decoder
- DDR3 SDRAM controller
- AHB DMA 32 / 64 bits
- AXI DMA 32 / 64 bits
- Ethernet MAC 10/100 Mbps
- Fixed Point Arithmetic Modules
- Featherweight RISC-V
- 802.3an LDPC Decoder
- 802.3an LDPC Encoder
- Simple RS232 UART
- OpenRisc 1200 HP, Hyper Pipelined OR1200 Core
- OpenRISC 2000
- Parallel CRC Generator
- Reed-Solomon Codec Generator
- Generic AXI to AHB bridge
- Generic AXI to APB bridge
- SGMII
- smbus_if
- Ethernet SMII
- UART16750
- USB 2.0 Function Core
- USB Device Core
- USB Host Core
- Fixed Point Math Library for Verilog
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