Public Profile of Bruner, Paul
Info
| Username | WarlockD |
| Fullname | Bruner, Paul |
| WarlockD@openco... (@opencores.org) | |
| State | Texas |
| Country | United States |
Starred projects 23
- i8080 compatible processor using Am29XX bit slice family and microcoded design
- Automatic BAUD rate generator
- BiRiscV - 32-bit dual issue RISC-V CPU
- CAN Protocol Controller
- small non-pipelined, 3 stage 16-bit cpu (fetch,decode,execute)
- DarkRISCV
- EZUSB communication core
- Fixed Point Arithmetic Modules
- FlexGripPlus General Purpose Graphics Processing Unit (GPGPU) core
- Floppy Drive Controller
- GPU
- Manchester to UART converter
- MCPU - A minimal CPU for a CPLD
- OpenRisc 1200 HP, Hyper Pipelined OR1200 Core
- ORSoC Graphics Accelerator
- PCIe_mini (PCI-Express to Wishbone Bridge for Xilinx FPGAs)
- PDP-8 Processor Core and System
- Minimal PDP8/L implementation with 4K disk monitor system
- QuadFixedPoint32 Arithmetic Unit
- Ray Tracing Arithmetic Engine
- Spartan 6 PCIexpress card
- TMS1000
- An inventory of soft processor cores
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