OpenCores

CAN Protocol Controller :: Bugtracker

Request(s)
Date Title Status Assigned to Submitted by
Jun 20, 2016 crc error when running main frame basic OPENED marcelpm
Jan 17, 2016 TestBench OPENED Badr
Dec 23, 2015 Request for information regarding SJA1000 OPENED amlihbb
Nov 3, 2015 Finding difficulty in defining macros OPENED pavanbhabat
Mar 7, 2013 Corrupted data, bug found OPENED tionex
Feb 6, 2010 HOWTO use testbench OPENED Spellic
Jan 25, 2010 Wishbone Clock OPENED hellsmurf
Jan 22, 2010 OPENED hellsmurf
Dec 30, 2009 language OPENED woofeeka
Jun 19, 2009 APPLICATION ON ACTEL DEVICES OPENED alexhex
Jan 12, 2009 PeliCAN mode OPENED liwei27
Nov 3, 2008 Query regarding PCI-CAN OPENED kirankumarnm@infotechsw.com
Apr 1, 2007 Controller area network protocol is not available!! CLOSED mdnaimaths@yahoo.com
Jul 20, 2004 single shot transmission CLOSED tderham@iee.org
May 29, 2004 Register Assignment CLOSED kewangke@web.de
Apr 5, 2004 Research Postgrad. CLOSED david.m.kenny@nuigalway.ie
Bug(s)
Date Title Status Assigned to Submitted by
Feb 16, 2015 Baud Rate Prescaler off by 2x OPENED flirchuck
Feb 16, 2015 Cross clock issue with wishbone OPENED flirchuck
Mar 19, 2014 Problem with reception in Basic mode OPENED felixtheliger12
Jun 17, 2010 incorrect received messages from fifo after some time OPENED rameshb
Oct 19, 2009 can_registers.v: transmit_irq no set OPENED fig
Jul 6, 2009 register removal OPENED Brent_Zajac
Jan 20, 2009 byte count when recovering from error frame OPENED svhb@vandewiele.com
Nov 12, 2008 Error in recovery from BUSOFF OPENED bortsov@yandex.ru
Apr 30, 2008 can_fifo.v: rd_info_pointer increment bug OPENED tshah105@gmail.com
Mar 10, 2008 Can controller not reciving data in basic can mode OPENED ankurrawat0612@gmail.com
Nov 30, 2004 IRQ reset bug CLOSED uceeted@ucl.ac.uk
Apr 8, 2004 Is the VHDL version not tested at all? CLOSED patrik.green@japs.se
Idea(s)
Date Title Status Assigned to Submitted by
Jan 12, 2016 Simplify code OPENED bareil76
Jul 11, 2014 Reset OPENED simon.gansen
Jan 30, 2009 How to interface to an ARM9 ? OPENED shangdawei
Nov 22, 2005 the verilog code needs documentation CLOSED ravindra_bn@yahoo.com
Apr 7, 2004 Research Engineer. CLOSED david.m.kenny@nuigalway.ie
Apr 5, 2004 Research Postgrad. DELETED david.m.kenny@nuigalway.ie
Apr 5, 2004 Research Postgrad. DELETED david.m.kenny@nuigalway.ie
Oct 13, 2003 32 bit wide Wishbone I/F CLOSED dave@luscher.co.uk
Sep 1, 2003 needs documentation!!! CLOSED tomcurran@rcsis.com
Reminder(s)
Date Title Status Assigned to Submitted by
Apr 27, 2012 Motorola vs. Intel modes OPENED kenwells85
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