Public Profile of vector, zhu
Info
| Username | shejisanzu |
| Fullname | vector, zhu |
| shejisanzu@openco... (@opencores.org) | |
| State | shanxi |
| Country | China |
Starred projects 56
- 10/100M Ethernet-FIFO convertor
- ARINC 429 Transmitter and Receiver
- AES core modules
- Generic AHB master stub
- ahb system generator
- Counter library
- Generic AXI master stub
- Generic AXI slave stub
- A VHDL CAN Protocol Controller
- a VHDL 16550 UART core
- baud generator
- CAN Protocol Controller
- CDC micro FIFO
- Cheap Ethernet interface
- Color Converter
- Dallas one-wire protocol with a DS1821 top level demo
- DDS Synthesizer
- DES Core
- AXI DMA 32 / 64 bits
- Ethernet Switch on Configurable Logic
- 1G Ethernet ARP
- Ethernet MAC 10/100 Mbps
- FireWire (IEEE 1394)
- Generic FIR Filter
- full ethernet gigabit udp and mac
- HDLC controller
- I2C Master Slave Core
- I2C Multiple Bus Controller
- Interrupt Controller 68k
- IPv4 Ethernet Packet Creator and Transmitter
- JTAG Test Access Port (TAP)
- JTAG Master
- Manchester to UART converter
- Manchester UART
- Manchester Decoder for Wireless
- NAND Controller (ONFI compliant)
- One Wire Master
- Parallel CRC Generator
- Video Pattern Generator
- PCI bridge
- PCI Target
- pci_mini
- Quadrature Decoder (for optical Encoders)
- RapidIO IP library
- Real-time Clock
- Simple Programmable Interrupt Controller
- SPI Flash controller
- TCP IP Core
- TCP/IP socket
- UART 16550 core
- UART16750
- FPGA remote slow control via UART 16550
- UDP/IPv4 for 10G Ethernet
- 1G eth UDP / IP Stack
- UDP/IP Core
- The VHDL Test Bench
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